IEEE standard for fault tolerant extensions to the Futurebus+ TM architecture / sponsor, Bus Architecture Standards Committee of the IEEE Computer Society.

This standard is one in a family of Futurebus+ TM standards. The Futurebus+ standards provide a set of tools with which to implement a bus architecture with performance and cost scalability over time for multiple generations of single- and multiple-bus multiprocessor systems. This standard provides...

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Bibliographic Details
Corporate Authors: IEEE Computer Society. Bus Architecture Standards Committee
Institute of Electrical and Electronics Engineers
IEEE Standards Board
Language:English
Published: New York, N.Y., USA : Institute of Electrical and Electronics Engineers, 1995.
Subjects:
Physical Description:viii, 97 pages : illustrations ; 28 cm
Variant Title:
Standard for fault tolerant extensions to the Futurebus+ TM architecture.
Format: Book
Description
Summary:
This standard is one in a family of Futurebus+ TM standards. The Futurebus+ standards provide a set of tools with which to implement a bus architecture with performance and cost scalability over time for multiple generations of single- and multiple-bus multiprocessor systems. This standard provides fault tolerant extensions to Futurebus+ standards. As such, this standard provides the logical layer requirements for the transmission of data in a fault tolerant environment. When used in conjunction with other IEEE standards, the details to develop modular, open-architechture-based systems fullfilling user needs across a wide computing spectrum are available.
Note:"IEEE Std 896.9-1994."
"Approved December 13, 1994, IEEE Standards Board."
"May 25, 1995"--Cover.
Call Number:TK5105.5 .I5452 1995
Bibliography Note:Includes bibliographical references (pages 4-5).
ISBN:1559375167
Action Note:
copy1 Committed to retain 20200101 20341231 MI-SPI http://www.mcls.org/engagement/mi-spi/ MiEM